docs/references/T4000.md

Jetson T4000 — facts from DS-11945-001 v1.4

Source: jetson_thor_series_modules_datasheet_ds-11945-001v1.4.pdf Arrow.com download. pdf2md 2026-09-01. Text-based, 59 pages, OCR not needed.

This is the SOM, not the AGX developer kit. The AGX kit is a T5000 module in a 243.19 × 112.40 × 56.88 mm brick.

Identity

T4000T5000 (same DS, for contrast)
GPUBlackwell, 2 GPC / 6 TPC / 1536 CUDA3 GPC / 10 TPC / 2560 CUDA
MIG exampleMIG_0: 4 TPC (GPC_0), MIG_1: 2 TPC (GPC_1)4 TPC + (4+2) TPC
GPU clock1.53 GHz at 70 W and MAXN1.386 GHz @ 120 W; 1.575 GHz MAXN
Tensor (sparse)1200 FP4 / 600 FP8 TFLOPS @ 70 W2070 FP4 / 1035 FP8 MAXN
FP32 CUDA4.700 TFLOPS7.096 @ 120 W / 8.064 MAXN
CPU12× Neoverse V3AE; SPECrate 7014×; SPECrate 80
DRAM64 GB 256-bit LPDDR5X, 273 GB/s. No Alt-link ECC128 GB, Alt-link ECC
NVENC / NVDEC1× / 1× (GPU rail). 1.56 GHz @ 70 W, 1.69 GHz MAXN2× / 2×
ISP12
MGBE up to 25 Gbps, 75 Gbps total4×, 100 Gbps total
CANnone (T5000 only)
SYS_VIN_SV 3.3 Vnone (T5000 only)required
Default power mode70 W120 W
Max TMP before throttle90 W130 W
TTP max75 °C80 °C

Tj −25 °C … 115 °C; slowdown 109 °C. Lifetime 5 years 24×7. Storage NVMe off-module.

Encode / decode (FACT, tables 2-3 and 2-5)

YUV420 8-bit, indicative.

T4000 70 W HEVC HQ: 2× 4Kp30, 1× 4Kp60. HP: 4× 4Kp30, 1× 4Kp60. UHP: 6× 4Kp30, 3× 4Kp60.

T4000 70 W HEVC decode Main/Main10: 9× 4Kp30, 4× 4Kp60, 2× 8Kp30.

Bring-up 1 body + 2 sats at 4K30 needs 3 HQ encodes. T4000 HQ cannot do that. Hybrid (Thor encodes body, sats encode on camera) is the T4000-safe path. See STREAM-BUDGET.md.

Camera I/O (ch. 2.10, 4.1, 4.2)

  • MIPI CSI-2: up to 6 cameras / 16 lanes, 32 virtual channels. D-PHY 2.1 40 Gbps aggregate (2.5 Gbit/s per pair, eight pairs). C-PHY 2.1 spec 164 Gbps; qualified 2.5 Gsps — ask NVIDIA for more.
  • RAW6–14, YUV422-8, RGB. Body cam path.
  • CoE (Camera over Ethernet): shared Ethernet instead of point-to-point CSI. Same idea as HSB / GigE Vision.
  • HSB: up to 20 cameras (overview table).
  • ISP: one engine, max 1215 MHz, 3.5 GPixel/s, Bayer ≤ 24 MP, 30° CRA.

Networking (4.10.1) — do not treat QSFP as 100GbE

Each MGBE is independent at 2.5 / 5 / 10 / 25 Gbps (XFI/SFI, USXGMII, 25GAUI). MACsec to 25G.

When those lanes hit a QSFP28 cage they stay four (or three) separate controllers. They do not aggregate to 40G/100G. A 100G switch in 100G mode will not talk to the cage.

IEEE 1588v2, 802.1AS, 802.1Qbv/Qbu, TSN — usable for PTP across PoE satellites.

PHY, magnetics, RJ45 are off-module.

Power (ch. 3, table 3-1 / 6-1 / 6-2)

Carrier must supply:

RailT4000TypicalImax
SYS_VIN_HV7–20 V12 V22 A @ 20 V
SYS_VIN_MV5 V5 V6 A
SYS_VIN_SVnot present
PMIC_BBATT1.85–5.5 VRTC coin50 µA

Default 70 W; clocks throttle if module power exceeds 90 W.

Mechanical (6.4) — enclosure

87.0 × 100.0 × 15.29 mm, 0.350 kg ±4%. 699-pin B2B. Mounting holes “A” mate module + motherboard + thermal solution (figures 6-1…6-5 in the PDF; pdf2md does not extract drawings).

Thermal extract: THERMAL.md. First print is still the AGX kit envelope, not this 15 mm sandwich. Production body is metal; 70 W fanless handheld is not honest.

  • DG-12084-001 Design Guide — pinmux, MGBE PHY, CSI routing (not in tree)
  • TDG-12271-001 v1.3 Thermal Design Guide — in tree
  • Pinmux template